Offer summary
Qualifications:
BS or MS degree in Electrical Engineering or related field, 3-5 years in hardware design development, Expertise in Verilog, SystemVerilog, VHDL, SystemC, Experience with scripting and verification workflows, Familiarity with UVM environments and Formal Verification.
Key responsabilities:
- Develop and customize hardware design platform
- Generate training data for enterprise LLMs
- Liaise with research teams for actionable insights
- Optimize coding, debugging, and documentation standards
- Collaborate to prioritize needs across teams